Physical Design Engineers: Minimum 3 years of relevant Experience in the area of SOC Physical Design!

Semiconductor Training @ Rs.1 supports the engineers to get the job opportunities across globe. For one of the client there is requirement of Physical Design Engineers. Following are the details:

Location : Bangalore

Technical Skills:
a.    At least 3 years of relevant SoC Physical Design implementation experience with contribution in multiple tape out
b.    Experience in top and(or) block) level floor planning, Place and Route, CTS, logical and physical optimization, timing closure, power and signal integrity, design physical verification (LVS and DRC), functional verification etc.
c.    Experience in working with Cadence SoC Encounter (EDI) and caliber.
d.    Working knowledge of scripting languages like Perl, Tcl, shell scripting

Desirable Skills:
e.    Understanding of verilog based digital design and coding.
f.    Knowledge of Industry standard verification tools for simulation and debug
g.    Fundamental understanding of Design For Manufacturability (DFM) Familiarity with spice simulation tools e.g. HSpice/HSIM
h.    Understanding and working experience in static and dynamic IR-drop analysis

Interested candidates can send profile at onerupeest@gmail.com